The forming of semi-conductor devices, particularly including integrated circuits, by successive etching and depositing of materials on a silicon wafer or chip is a well known process. Such devices generally include a surface with at least one functional semi-conductor area separated from surrounding areas on the surface by an isolation barrier. Electrical contact with selected portions of the semi-conductor area is made by metallic contacts and connecting leads. Typically these contacts and leads comprise sputtered aluminum deposited over a metallic base layer, formed of titanium-tungsten for example. This base layer prevents diffusion of aluminum into the silicon base of the chip, in which aluminum is soluble.
Surrounding the terminal points or portions where electrical contact is made with the semi-conductor area and interposed between the conductive leads or pathways between those points and the underlying surface is a passivation coating. This passivation coating (also referred to sometimes as a diffusion barrier coating) covers the silicon surface and protects it from bombardment or diffusion with contaminant ions. Silicon dioxide (silica) which ordinarily comprises a significant part of this barrier, is easily formed by oxidation of the underlying silicon surface. Certain ions, most particularly alkaline metal ions such as ions of sodium and potassium, require a separate diffusion barrier. For this purpose, a nitride layer is often placed over the silica sublayer of the passivation or diffusion barrier coating.
The passivation coating also serves as an insulator between the conductive leads and the underlying chip surface. In this respect, the electrical characteristics of the passivation coating are significant, since the insulative and capacitance values of this coating are factors in circuit design.
It is common to first deposit the silica part of the passivation or barrier coating by oxidation of the silicon chip surface to a thickness on the order of 2000-3000 .ANG.. A nitride layer is then formed in accordance with conventional techniques by low pressure vapor deposition at elevated temperature, on the order of 800.degree. C. from a 200 mtorr atmosphere. The nitride-silica passivation coating is then etched to expose portions of the semi-conductor area on the silicon chip, in which the titanium tungsten sublayer and then the aluminum overlayer are deposited. At the same time the electrically conducting pathways are similarly deposited (over the passivation coating) to form conducting paths connected to at least one of the terminals or points in the semi-conductor area.
In the course of this process, at least one of the semi-conductor area portions is typically doped with an emitter dopant, such as phosphorous. And the nitride layer of the composite passivation coating may serve as a mask for the emitter dopant.
Otherwise a variety of masks, particularly including photographically developable resists, are used to selectively deposit, etch, or mask different areas of the chip surface in which various parts of the process are to be conducted.
In the course of manufacturing integrated circuit silicon chips as heretofore described, a variety of problems arise particularly including the production of an excessive number of defective circuits, thus adding to the cost of the manufacturing process. To some degree, these manufacturing defects are attributable to the inclusion of the nitride in the passivation layer. In some manufacturing processes this nitride layer is omitted, but this can be done only at the expense of circuit design requiring greater spacing between terminal points and other safety factors.
It is therefore an object of the present invention to provide an improved manufacturing process and passivation coating structure which includes the nitride sublayer and avoids certain defects and inherent manufacturing problems experienced in prior designs and manufacturing processes.